This invention is in the field of digital computers. In a preferred embodiment, a method and apparatus for enabling a computer to run programs which utilize either of at least two different byte orders is disclosed.
It is known that different computer systems organize the words of data in their memories differently. Some computers store words of data with the least significant bit residing at the lowest address. Such machines have the so-called "Little Endian" ("LE") architecture. Other computers store data with the most significant bit (or, in some cases, the sign bit) residing at the lowest address. These machines have a "Big Endian" ("BE") architecture. Numerous articles describe these data organization systems in greater detail. One such article is Cohen, "On Holy Wars and a Plea for Peace," Computer, 10/81, pp. 48-54.
Whether a machine is BE or LE makes little difference within that particular machine. Although each architecture has its proponents, the consensus appears to be that both architectures are equally advantageous.
The use of two architectures presents a problem when machines of different architectures must interact or when software written for one type of machine is run on a machine of a different type. In these situations, data or programs stored in one machine according to one architecture would be misinterpreted by a machine of a different architecture. Additionally, instructions which access or manipulate parts of data words will have greatly different results.
The incompatibility between little- and big-endian machines has generated numerous attempts to improve interoperability. Most of these attempts have resulted in a hardware apparatus, usually comprised of a combination of shift registers and various logic gates. Although such hardware may allow both BE and LE instructions to operate, the hardware adds to the computer systems' complexity and reduces its speed. Both of these results are undesirable.